
Experience
- Product Manager
NVIDIA (May 2024-Current) - TAC Member
PQCA (May 2024-Current) - Governing Board Member
PQCA (December 2024-Current) - Assistant Teaching Professor
WPI (July 2018 – April 2024) - Research Scientist
NJIT (June 2017 – August 2018)
I work as a Product Manager at NVIDIA, where I oversee cuPQC , a GPU-accelerated library designed to enhance the performance of cryptographic schemes. I am a cryptographer and security researcher with a specialization in Privacy Enhancing Technologies, Fully Homomorphic Encryption, Post-Quantum Cryptography, Blockchains, and the design of Cryptographic Hardware/Software Accelerators.
In addition to my role at NVIDIA, I serve as a Technical Advisory Committee member and Governance Board member at the Post-Quantum Cryptography Alliance (PQCA), which is under the Linux Foundation.
Previously, I served as a Teaching Assistant Professor in the Electrical and Computer Engineering Department at Worcester Polytechnic Institute (July 2018 – April 2024). During this time, I developed new Post-Quantum schemes efficient for blockchains and investigated side-channel attacks on TLS libraries. I co-founded QuantumSafe, a company focused on implementing Post-Quantum Cryptography for blockchains (January 2019 – June 2021). Prior to that, I was a Research Scientist in Computer Science at the New Jersey Institute of Technology, collaborating with Assoc. Prof. Kurt Rohloff (June 2017 – August 2018).
I hold a Ph.D. in Electrical and Computer Engineering from Worcester Polytechnic Institute (January 2012 – June 2017). As part of the Vernam Research Group, I worked with Prof. Berk Sunar on accelerating Fully Homomorphic Encryption (FHE) schemes and applications.
I received my BSc. degree in Electronics Engineering in 2009 and my MSc. degree in Computer Science in 2011 from Sabanci University.
Interests:
- Post-Quantum Cryptography
- Blockchains and Cryptocurrencies
- Fully Homomorphic Encryption Schemes
- Hardware designs of Cryptographic Schemes
- Accelerating Cryptographic applications using hardware/software co-designs
- Efficient hardware implementations of very-large integer and polynomial arithmetic
Selected Publications
- MMSAT: A Scheme for Multimessage Multiuser Signature Aggregation
by Yarkın Doröz, Jeffrey Hoffstein, Joseph H. Silverman, Berk Sunar
Cryptography ePrint Archive. (BIB) (PDF) - Fully Homomorphic Encryption from the Finite Field Isomorphism Problem
by Yarkın Doröz, Jeffrey Hoffstein, Jill Pipher, Joseph H. Silverman, Berk Sunar, William Whyte, Zhenfei Zhang
Cryptography ePrint Archive. (BIB) (PDF) - Implementation and Evaluation of a Lattice-Based Key-Policy ABE Scheme
by Wei Dai, Yarkın Doröz, Yuriy Polyakov, Kurt Rohloff, Hadi Sajjadpour, Erkay Savaş, Berk Sunar
Cryptography ePrint Archive. (BIB) (PDF) - Flattening NTRU for Evaluation Key Free Homomorphic Encryption
by Yarkın Doröz, Berk Sunar
Cryptography ePrint Archive. (BIB) (PDF) - A Custom Accelerator for Homomorphic Encryption Applications
by Erdinç Öztürk, Yarkın Doröz, Berk Sunar, Erkay Savaş
IEEE Transactions on Computers, 2016. (BIB) (PDF) - Homomorphic AES Evaluation Using the Modified LTV Scheme
by Yarkın Doröz, Yin Hu and Berk Sunar
Design, Codes and Cryptography – DCC, 2014. (BIB) (Springer) (PDF) - Accelerating Fully Homomorphic Encryption in Hardware
by Yarkın Doröz, Erdinç Öztürk and Berk Sunar
IEEE Transactions on Computers, 2013. (BIB) (IEEE) (PDF) - A Million-bit Multiplier Architecture for Fully Homomorphic Encryption
by Yarkın Doröz, Erdinç Öztürk and Berk Sunar
Microprocessors and Microsystems, 2014. (BIB) (MICRO) (PDF)